/*******************************************************************************
 * File name: vectors.S
 * Description: asembler file which defines interrupt vector
 * Project: _Wzorzec
 * Target: LPC2478
 * Compiler: arm-none-eabi-gcc
 * Date: 2010-10-12
 * Author: Kuba
 * Based on: Freddie Chopin, http://www.freddiechopin.info
 *******************************************************************************/
# define NESTED_IRQ     1
/*------------------------------------------------------------------------------
 Interrupt handlers. On ARMv4 architecture it cannot return, as each interrupt
 has its own return method!
------------------------------------------------------------------------------*/
.text                       /* .text section contains program code */
.balign 2                   /* data alignment, 2 specyfies multiple of 2*/
.syntax unified             /* set the Instruction Set Syntax to correctly distinguish between ARM & THUMB */
.arm                        /* selects the instruction set to 32 ARM. The same as .code 32 */
.func __Undef_Handler       /* denotes function __Default_Handler. Must terminate with .endfunct */
.global __Undef_Handler     /* makes the symbol visible to ld- it's available to other partial programs */

__Undef_Handler:
    b .                     /* endless loop */

.endfunc

.text                       /* .text section contains program code */
.balign 2                   /* data alignment, 2 specyfies multiple of 2*/
.syntax unified             /* set the Instruction Set Syntax to correctly distinguish between ARM & THUMB */
.arm                        /* selects the instruction set to 32 ARM. The same as .code 32 */
.func __PrefAbort_Handler    /* denotes function __Default_Handler. Must terminate with .endfunct */
.global __PrefAbort_Handler  /* makes the symbol visible to ld- it's available to other partial programs */

__PrefAbort_Handler:
    b .                     /* endless loop */

.endfunc

.text                       /* .text section contains program code */
.balign 2                   /* data alignment, 2 specyfies multiple of 2*/
.syntax unified             /* set the Instruction Set Syntax to correctly distinguish between ARM & THUMB */
.arm                        /* selects the instruction set to 32 ARM. The same as .code 32 */
.func __DataAbort_Handler        /* denotes function __Default_Handler. Must terminate with .endfunct */
.global __DataAbort_Handler  /* makes the symbol visible to ld- it's available to other partial programs */

__DataAbort_Handler:
    b .                     /* endless loop */

.endfunc

.text                       /* .text section contains program code */
.balign 2                   /* data alignment, 2 specyfies multiple of 2*/
.syntax unified             /* set the Instruction Set Syntax to correctly distinguish between ARM & THUMB */
.arm                        /* selects the instruction set to 32 ARM. The same as .code 32 */
.func __Fiq_Handler        /* denotes function __Default_Handler. Must terminate with .endfunct */
.global __Fiq_Handler  /* makes the symbol visible to ld- it's available to other partial programs */

__Fiq_Handler:
    b .                     /* endless loop */

.endfunc

/*------------------------------------------------------------------------------
 Assign all unhandled interrupts to the default handler
------------------------------------------------------------------------------*/
/* Undefined instruction */
.weak	Undefined_Handler						/* sets the weak attribute- it causes the declaration to be emitted as a weak symbol rather than a global */
.global	Undefined_Handler
.set	Undefined_Handler, __Undef_Handler

/* Software interrupt (SWI) */
.weak	SWI_Handler
.global	SWI_Handler
.set	SWI_Handler, swiHandler

/* Prefetch Abort (instruction fetch memory abort) */
.weak	Prefetch_Abort_Handler
.global	Prefetch_Abort_Handler
.set	Prefetch_Abort_Handler, __PrefAbort_Handler

/* Data Abort (data access memory abort) */
.weak	Data_Abort_Handler
.global	Data_Abort_Handler
.set	Data_Abort_Handler, __DataAbort_Handler

/* FIQ (fast interrupt) */
.weak	FIQ_Handler
.global	FIQ_Handler
.set	FIQ_Handler, __Fiq_Handler             /* write here name of FIQ ISR */

/*------------------------------------------------------------------------------
 Vector table
------------------------------------------------------------------------------*/
/*
	VIC IRQ vector for older LPCs (where &VICVectAddr = 0xFFFFF030, e.g. LPC2103):
		ldr		pc, [pc, #-0xFF0]
 	VIC IRQ vector for newer LPCs (where &VICAddress = 0xFFFFFF00, e.g. LPC2478):
		ldr		pc, [pc, #-0x120]
*/

.section .vectors	/* .section assembles the following code into a section named .vectors */
.balign 2
.syntax unified
.arm
__vectors:

	ldr		pc, =Reset_Handler			/* 0x00000000 Reset exception- this loads the PC with the address of Reset_Handler */
	ldr		pc, =Undefined_Handler		/* 0x00000004 Undefined Instruction exception 	*/
	ldr		pc, =SWI_Handler			/* 0x00000008 Software Interrupt exception		*/
	ldr		pc, =Prefetch_Abort_Handler	/* 0x0000000C Prefetch Abort exception			*/
	ldr		pc, =Data_Abort_Handler		/* 0x00000010 Data Abort exception				*/
	nop									/* 0x00000014 reserved for code signature		*/
# if NESTED_IRQ
	ldr 	pc, =IRQ_Handler			/* 0x00000018 nested interrupt handler */
# else
	ldr	pc, [pc, #-0x120]				/* 0x00000018 load pc with 1 word from the VIC	*/
# endif
	ldr		pc, =FIQ_Handler			/* 0x00000001C Fast Interrupt exception			*/


/******************************************************************************
 END OF FILE
******************************************************************************/
